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ARM CPU Subsystem Design Leader

Renesas Electronics · Kodaira

New
Senior 🇬🇧 English
CPU cores Cache architecture Cache coherency SoC integration Logic design and verification

Job description

About the role

Renesas is looking for a technical leader to define the design direction of the CPU subsystem for automotive SoCs (the R-Car series) and to own a primary technical area. The role works with surrounding teams and IP vendors, in English, within a global development environment. Details of the exact scope and possible changes in location and scope are given during the interview.

Key responsibilities

  • Take part in specification definition and architectural study of the CPU subsystem for automotive SoCs.
  • Work on CPU cores, cache architecture (L1/L2/L3, cache coherency) and memory-related areas, organizing design directions from a subsystem-level optimization view.
  • During logic design and verification, identify and structure technical issues, contribute to design decisions and help drive development.
  • Consider power, performance and reliability constraints and make technical judgments aligned with overall SoC requirements.
  • Communicate with IP vendors to confirm specifications, clarify constraints and assumptions and support issue resolution.
  • Collaborate with design teams in India and Vietnam and with IP vendors in a global environment.

Required profile

  • Hands-on experience in at least one of: CPU/processor cores (exceptions, interrupts, control logic), cache architecture (hierarchy, coherency, memory consistency), or memory areas (interconnect, memory control, interfaces).
  • Ability to organize design directions and key discussion points and share them with stakeholders.
  • Understanding of the logic design and verification flow and experience in technical reviews and discussions.
  • Communication skills and willingness to communicate in English for technical meetings and specification reviews.
  • Nice to have: technical lead experience at subsystem or IP level, multi-core CPU and cache coherency experience, SoC integration experience, knowledge of power domain separation and physical implementation (P&R), automotive SoC or functional safety/reliability experience, and conversational Japanese.

Questions fréquentes

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Source : ats:smartrecruiters

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Published 1 hour ago

Expires 1 month from now

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Renesas Electronics

Kodaira